1. Field of the Invention
This invention generally relates to semiconductor processing, and, more particularly, to gate formation in metal oxide semiconductor transistors.
2. Description of the Related Art
One technique used in semiconductor processing for reducing so-called hot-carrier effects in metal oxide semiconductor field effect transistors is the formation of lightly-doped drain (LDD) structures. In traditional LDD structures, the source/drain is formed by two implantation steps. The first of these implantations is a light-doping step that is self-aligned to the gate electrode. The second step is a heavy-doping step that is self-aligned to two oxide sidewall spacers previously formed adjacent the gate electrode. After the first light-dopant implantation step, sidewall spacers are formed to protect a portion of the lightly-doped substrate adjacent the gate electrode during the subsequent heavy-doping implantation step.
Although LDD structures are advantageous for reducing hot-carrier effects, traditional methods of forming these type of structures results in increased fabrication complexity and associated costs. In particular, formation of the traditional sidewall spacers requires several processing steps, e.g., oxide deposition etching and cleaning, that increase fabrication complexity and the time and costs associated with these steps. The present invention is directed to a method of solving some or all of the aforementioned problems.